What was actually announced

Rapidus Corporation — a Japanese semiconductor firm founded in 2022 with the ambition to manufacture the world's most advanced 2nm chips — and Cadence Design Systems, a leader in electronic design automation (EDA) software, announced a key collaboration on July 16, 2026. At the heart of the agreement is the integration of the Cadence InnoStack AI Super Agent — an agentic AI tool for orchestrating design processes — into the Raads (Rapidus AI-Agentic Design Solutions) platform, which is Rapidus's own AI environment for chip design and manufacturing.

The result is expected to be up to twice as fast design cycle turnaround time (TAT) compared to traditional methods. In practice, this means chip designers can bring their product to market in half the time — a crucial advantage in an industry where every month of delay costs tens of millions of dollars.

What is Raads and why it matters

Raads (Rapidus AI-Agentic Design Solutions) is a suite of tools leveraging machine learning that connects the chip design process with real manufacturing data. Rapidus calls this concept "Manufacturing for Design" — manufacturing and quality data from the pilot line in Chitose, Hokkaido, is fed back into the design process in real time.

Rapidus is now expanding Raads with two critical tools: Raads Navigator for design quality management and Raads Indicator, which helps engineers identify and resolve issues in real time. These components are newly connected with Cadence's InnoStack AI Super Agent, which acts as the "conductor" of the entire design workflow — from initial architectural exploration through implementation to final signoff.

Agentic AI in chip design: More than just automation

The key difference compared to ordinary AI tools is that agentic AI doesn't just optimize individual tasks — it manages entire workflows. As Cadence President and CEO Anirudh Devgan stated in the press release: "Advanced SoC design increasingly requires AI agents that can orchestrate complex workflows across the entire design lifecycle, not just optimize individual tasks."

This is a fundamental shift. While existing AI tools in EDA helped with tasks such as transistor layout optimization or design rule checking, agentic AI like InnoStack takes responsibility for the entire process — deciding what needs to be done, in what order, and how each step connects to the next.

This approach is part of a broader trend we're seeing across the entire semiconductor industry. Agentic AI is becoming one of the main topics in 2026 at conferences such as CadenceLIVE or the ESD Alliance panel.

Rapidus: Japan's tiger on the road to 2nm chips

Rapidus is no ordinary startup. The company, led by semiconductor industry veteran Dr. Atsuyoshi Koike (formerly of Tokyo Electron and Western Digital), has over 425 billion yen (roughly 66 billion CZK) in capital and massive support from the Japanese government.

The IIM (Innovative Integration for Manufacturing) complex in Chitose, Hokkaido, launched its pilot line in April 2025, and mass production of 2nm chips is set to begin in 2027. Rapidus is betting on GAA (Gate-All-Around) technology — a transistor architecture that surrounds the conductive channel on all sides, delivering significantly higher performance with lower power consumption compared to current FinFET chips.

To put that in perspective: according to Rapidus, the transition from current chip processes to 2nm technology can reduce the energy consumption of the same chip to as little as one quarter. At a time when data centers worldwide are consuming ever more electricity, this is a critical factor.

What this means for Europe and Czechia

Although at first glance this is a purely Japanese-American partnership, there is a European dimension here. In recent months, Rapidus has signed memoranda of cooperation with the Italian Fondazione Chips-IT and the UK semiconductor center, signaling its ambition to collaborate with the European chip ecosystem.

For Europe, which is investing billions of euros into its own chip manufacturing under the EU Chips Act, this is an important signal. The agentic AI tools from Cadence and Rapidus show a path to making chip design more efficient under European conditions as well. For Czech companies operating in electronics design or embedded systems, it can serve as inspiration for where cutting-edge integrated circuit design tools are headed.

The Czech Republic has a long tradition in chip design — from Brno-based onsemi (formerly ON Semiconductor, now onsemi) to dozens of smaller design firms. While 2nm processes are currently beyond the reach of domestic players, the methodology of using AI in design processes is transferable even to simpler manufacturing nodes.

Why this matters right now

The announcement comes at a time when the entire semiconductor industry is grappling with how to handle the growing complexity of advanced chip designs. The number of transistors per chip is increasing, manufacturing rules are becoming ever stricter, and the time required for design verification is lengthening. Without AI assistance, it's impossible to keep this curve in check.

Rapidus and Cadence offer a concrete answer. By integrating agentic AI into the entire design cycle, they aim not only to speed up development but also to increase the predictability of design outcomes — a factor that is crucial for customers planning mass production.

Whether the ambitious goal of halving turnaround time will be achieved remains to be seen in practice. The first results of the collaboration will be presented at the CadenceLIVE Japan 2026 conference, where Rapidus CEO Dr. Koike will deliver a keynote presentation. But one thing is already certain: the combination of advanced manufacturing and agentic AI represents a new standard in the semiconductor industry — and those who fail to embrace it risk losing their competitiveness.