Accelerating Tools Is No Longer Enough

The semiconductor industry has seen tremendous progress in the performance of electronic design tools — so-called EDA (Electronic Design Automation) — in recent decades. Simulators run on clusters of hundreds of servers, formal tools verify billions of states, and emulators can mimic the behavior of an entire system on a chip before it is even manufactured. Yet the productivity of verification teams is improving ever more slowly.

The reason is simple: RTL verification — verifying the design at the Register-Transfer Level description — has long ceased to be a linear process. Specifications change during development, designs grow to enormous sizes, and each iteration reveals new risks. "The biggest problem today is not the computational performance of individual tools, but the complexity of the entire workflow," writes Harry Foster, chief scientist for verification at Siemens EDA.

According to industry analyst estimates, verification now consumes 60–70% of the time and cost of integrated circuit development. While the simulation itself may take hours, deciding what to simulate, how to interpret the results, and how to adjust the test plan takes weeks.

What Is Agentic AI and How It Differs from Classic Automation

Classic automation works like an assembly line: it has fixed inputs, predictable steps, and a single output. But chip development doesn't work that way. Designs evolve, requirements change, and intermediate results often reveal unexpected new problems.

Agentic AI represents a different approach. Instead of isolated scripts and standalone tools, intelligent agents operate across the entire workflow. Agents monitor the current design status, plan constrained actions, carry out tasks, and summarize results. Crucially, this is not a black box — effective systems are designed to keep humans in control.

Foster emphasizes that AI sitting outside the tool chain and merely parsing logs or generating scripts can actually increase overhead and reduce engineers' trust. The solution is tight integration: agents must use the same coverage models, semantics, and control mechanisms that are required for final chip sign-off.

Questa One Agentic Toolkit: A Concrete Solution from Siemens EDA

Siemens EDA, one of the three global giants in EDA alongside Cadence and Synopsys, has introduced the concept of the Questa One Agentic Toolkit. It is an extension of its Questa One verification platform with agentic workflows focused on the human.

The tool has four pillars:

• Engine-native context — agents communicate directly with tool engines, not through unstructured logs. They can run simulations, query coverage, and analyze failures through controlled interfaces.
• Goal-driven agents — agents are driven by goals, not just predefined scripts. They can, for example, adjust the test plan when the design specification changes.
• Human-in-the-loop — engineers approve key decisions. AI accelerates execution and analysis, but authority over final sign-off remains with the human.
• Open integration — the toolkit supports open integration with existing workflows and third-party tools.

According to Siemens, this approach delivers "measurable productivity gains without compromising trustworthiness."

Where Agentic AI Is Already Helping Today

The first deployments of agentic systems in RTL verification are already delivering tangible results in several areas:

RTL Development and Code Changes

AI assistants can generate or modify code to better meet verification requirements and catch problems before they reach simulation. This saves hours of manual rewriting.

Lint and Static Analysis

Static tools often generate hundreds or thousands of warnings, most of which are not critical. Agentic systems can intelligently filter noise and focus the engineer's attention on real risks.

Clock Domain Crossing (CDC)

Transferring signals between parts of a circuit with different clocking is one of the most common causes of chip failures in the field. Iterative analysis and refinement of the design with AI assistance accelerates convergence toward a robust asynchronous solution.

Verification Planning

Agents can translate evolving specifications into structured test plans that automatically adapt to design changes. This eliminates a number of manual documentation reviews.

Debug and Root Cause Analysis

Correlating waveforms, assertions, and logs across simulation runs can exponentially speed up finding the cause of a bug. What previously took days can now be narrowed down to a few hours.

Humans Remain in Charge

Despite rapid AI progress, full autonomy in RTL verification is neither realistic nor desirable. "The goal is not to replace engineers, but to reduce manual coordination so they can focus on decision-making and risk mitigation," Foster points out.

Verification decisions often depend on incomplete specifications, implicit assumptions, and trade-offs that require human experience. Determining when results are "good enough" is rarely a black-and-white matter. That's why effective agentic systems include explicit approval points — AI proposes and accelerates, humans approve.

To maintain trust and accountability, three principles are key:

• Bounded actions — agents can only do what is predefined.
• Output qualification — AI results go through the same validation mechanisms as human outputs.
• Mandatory human review — a human must be involved in key decisions.

What This Means for the Czech Republic and Europe

For Czech readers, it is important to realize that these are enterprise tools primarily intended for the semiconductor industry. They are not available as common SaaS solutions for end users, and their licensing is handled individually, often in the range of tens to hundreds of thousands of Czech crowns per year depending on the scope of deployment.

Nevertheless, this development is also relevant for the Czech technology scene. The Czech Republic is home to significant development centers of companies such as ON Semiconductor and STMicroelectronics, which are involved in chip design. For them, agentic workflows can be a key factor in shortening time-to-market. Europe's effort to achieve technological sovereignty in chips — supported, for example, by the European Chips Act — depends, among other things, on the efficiency of development teams. Agentic AI in EDA can be one of the tools to catch up with Asia and the USA.

At the same time, the Czech Republic and Europe as a whole face a shortage of qualified chip design engineers. Agentic AI, which increases individual productivity, can partially alleviate this pressure and enable smaller teams to tackle more complex designs.

Where Development Is Heading

Agentic AI in EDA is still in its early stages. The current focus is on reducing friction in planning, execution, and analysis while maintaining firm engineer control. Broader workflow orchestration is expected in the long term, but only under conditions of transparency and robust validation.

As design complexity grows, the greatest benefit will not come from how fast tools run, but from how effectively work is organized. Agentic AI represents a shift toward so-called workflow intelligence — helping teams move faster without reducing the rigor needed for chip manufacturing sign-off.

For verification teams today struggling with growing iteration overhead, this shift cannot come soon enough.